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Faster Materials versus Nanoscaled Si and SiGe: A Fork in the Roadmap?
Strained Si and SiGe MOSFET technologies face fundamental limits towards the end of this decade when the technology roadmap calls for gate dimensions of 45 nm headed for 22 nm. This fact, and difficulties in developing a suitable high-K dielectric, have stimulated the search for alternatives to brute-force scaling of Si and SiGe MOSFETs. As part of this search we are exploring the use of InAs as an alternative to nanoscaled Si for future generations of high bandwidth MOSFET-based circuits. InAs has a high electron mobility. Its vsat is theoretically 20 times higher than silicon's. Our modeling shows that an HBT could achieve fT and fmax approaching 1 THz for an emitter-base and collector-base dimension of 0.5 _m x 4.0 _m (2 _m2). A simple MOSFET model predicts an fT of about 3 THz for a gate length of 0.1 µm. The model is consistent with known experimental measurements of InAs materials parameters. InAs technology may support ultra-fast devices at 90 nm and below, or performance at 90 nm comparable to strained Si and SiGe at 45 and 22 nm features. To support the integration of InAs devices with Si circuits, we are developing a high quality InAs epilayer technology using non-lattice-matched GaP substrates.
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